谢谢共享好资料

我觉得不管是什么类型的,什么牌子的,只要是好东西,总是会用的

顶一个 呵呵 收了~

The UltraSPARC T2 processor is the industry's first "system on a chip," packing the most cores and threads of any general-purpose processor available, and integrating all the key functions of a server on a single chip: computing, networking, security, and input/output (I/O), plus tight integration with the Solaris operating system.

Up to 8 cores, up to 64 threads per processor
Dual 10Gbit Ethernet and PCI-E integrated onto chip
Logical Domains (LDoms) for hardware virtualization with up to 64 OS instances
Cryptographic processing at wire speeds

可惜T2运算能力实在不咋样

http://www.opensparc.net/opensparc-t2/index.html
http://opensparc-t2.sunsource.ne ... nt-draft-HP-EXT.pdf

General Architectural and
Microarchitectural Differences
UltraSPARC T2 follows the CMT philosophy of UltraSPARC T1, but adds more
execution capability to each physical core, as well as significant system-on-a-chip
components and an enhanced L2 cache. The following lists the microarchitectural
differences:
■ Physical core consists of two integer execution pipelines and a single floatingpoint
pipeline. UltraSPARC T1 had a single integer execution pipeline and all
cores shared a single floating-point pipeline.
■ Each physical core in UltraSPARC T2 supports eight strands, which all share the
floating-point pipeline. The eight strands are partitioned into two groups of four
strands, each of which shares an integer pipeline. UltraSPARC T1 shared the
single integer pipeline among four strands.
■ Pipeline in UltraSPARC T2 is eight stages, two stages longer than UltraSPARC T1.
■ Instruction cache is 8-way associative, compared to 4-way in UltraSPARC T1.
■ The L2 cache is 4 Mbyte, 8-banked and 16-way associative, compared to 3 Mbyte,
4-banked and 12-way associative in UltraSPARC T1.
■ Data TLB is 128 entries, compared to 64 entries in UltraSPARC T1.
■ The memory interface in UltraSPARC T2 supports fully buffered DIMMS (FBDs),
providing higher capacity and memory clock rates, as described in Chapter 17.
■ The UltraSPARC T2 memory channels support a single-DIMM option for low-cost
configurations.
■ UltraSPARC T2 supports a pair of on-chip 1-Gbit/10-Gbit Ethernet interfaces,
referred to as the network interface unit (NIU). The NIU is described in
Chapter 22 through Chapter 28.
■ UltraSPARC T2 has an on-chip PCI-Express interface, which replaces the on-chip
JBUS interface of UltraSPARC T1. The PCI-Ex Unit is described in Chapter 21.

最近有一个项目,应用是LMS的.之前SUN做这项目失败了.四块CPU板的T1没跑起来. 明天去LMS在上海的分支机构了解一下应用软件的一些需求.再确定提供IBM啥机型. 上上周打电话去LMS北京技术咨询,有一个博士(人相当好,很感谢他)告诉我说,客户没买并行计算模块.应用只能用到一颗CPU,并且建议我配置多一些内存,CPU主频最大可能高一些.现在CPU主频最高也就5.0GHZ.经济型配置最高也就是4.7GHZ.而且应用还不一定在AIX上面适合.跟LMS的人交流,感觉他们是不懂小型机这块的.他们都是用WINDOWS操作系统.

[ 本帖最后由 小猪 于 2008-4-13 09:18 编辑 ]

"Zero Cost" Security
Integrated crypto onboard
The UltraSPARC T2 processor was designed with one integrated cryptographic unit for each of its eight cores. Integrated cryptographic acceleration means applications can run securely without the extra cost of a separate cryptographic processor, and without the high performance penalty previously associated with secure operation. Sun's integrated cryptographic units support the ten most common ciphers and secure hashing functions, including NSA approved algorithms. And, they outperform competing accelerators by more than 10x, with minimal performance impact.

这个忽悠猪，最近看书挺多的哈～

Migrating to Processors with Faster (but a smaller number of) CPUs

The following paper addresses a subject that is getting a lot of attention lately. Unfortunately, it is
also a subject that is widely misunderstood and filled with old wives tales and urban legends.
This is the debate over the benefits and problems associated with migrating from a S/390 or
zSeries processor with many slow CPUs to a new model with faster, but a smaller number of
CPUs.
Except for the initial introduction of CMOS processors back in 1994 (and Multiprise a few years
later), each successive generation of S/390 processors has introduced faster CPUs (engines) with
larger single image capacity compared to the previous generation. The recently announced z990
family continues that trend. The z990 uniprocessor is rated at approximately 60% more capacity
than the previous generation (2064-2C1) uniprocessor. Many mainframe IT shops are now
evaluating proposals to replace earlier generation S/390 and z900 processors with the new z990
series machines. If the current machine is more than one generation back from z990, the change
in single CPU speed can be quite large. For example, going from G4 technology to z990 shows
the single CPU speed growing from approximately 63 MIPS (R15) to 450 MIPS, an increase of
approximately 7 times. Although this is an extreme example, the typical processor upgrade will
result in fewer but faster CPUs. Thus the concern over the impact on performance.